Building tomorrow with the engineers of today

Senior Digital Verification engineer

VeroTech is hiring a Senior Digital Verification and Validation Engineer!

Your mission

You will play a pivotal role in advancing digital design through meticulous verification processes. Your expertise will be crucial in the development, verification, and validation of IP and system-level test cases for cutting-edge SoC / ASIC components. Your responsibilities will include:

  • Leading and managing digital verification efforts, ensuring the integrity and functionality of digital components
  • Developing and executing comprehensive verification plans and testbenches, leveraging your expertise in SystemVerilog and UVM
  • Collaborating closely with the verification team to monitor progress, troubleshoot issues, and ensure timely completion of verification tasks
  • Engaging in issue reporting and tracking, contributing to the continuous improvement of verification methodologies and processes

Your experience

  • A Master's or PhD in Electronics or Electrical Engineering
  • A minimum of 7 years of experience in digital verification, with a strong background in SystemVerilog and UVM
  • Demonstrated experience in IP and system-level verification
  • Proficiency in English, with excellent communication skills to effectively collaborate within a team

Why join VeroTech?

  • A motivating salary package, with the possibility of working from home and a company car
  • Improve your skillset within challenging mid to long-term R&D projects in a variety of high tech industries
  • Join an inspiring community of engineers with a range in expertise and experience levels
  • Work in a people-oriented company in an informal working environment
  • Support in your professional career from a business team providing technical and business related trainings