Digital Verification Engineer


Your mission

As a Digital Verification Engineer you are responsible for the verification of the digital sub-part of a mixed signal SoC used for battery management or wired communication. Your tasks include:

  • Verification of the digital part of mixed-signal SoC using Cadence Xcelium
  • Create the verification plan, develop the test bench, RTL functional verification, code coverage verification and post-layout functional verification
  • Use modern technologies using EDA tools
  • Keep yourself updated with the newest technologies in your field

Your experience

  • Master in Engineering (electrical, computer science, electronical)
  • Minimum 5 years of experience in digital design and digital verification for integrated circuits
  • Experienced in HDL languages (Verilog, SystemVerilog, VHDL)
  • Experised in the SOC design flow - RTL design, simulation, verification, DFT, signoff (Cadence, Synopsys, Mentor EDA tools)
  • Good understanding of CMOS technology
  • Scripting programming skills (TCL, PERL, linux shell scripting)
  • Good communication skills in English

VeroTech offers you

  • Grow your talents by challenging mid to long-term R&D projects in different industries
  • Join an inspiring community of engineers with different backgrounds and seniority levels
  • Working in a people-oriented company with an informal working environment
  • Close follow-up of your career path combined with technical and business related trainings
  • A motivating salary, with extralegal benefits and the possibility of a company car



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