IC Package Development Engineer
- Package Selection: Choose an appropriate IC package type based on given specs and IC requirements.
- Comprehensive Analysis: Evaluate chosen package's electrical, thermal, and mechanical characteristics. Identify potential limitations.
- Electrical Performance Optimization: Enhance signal integrity, power integrity, and EMC of the IC package. Address routing, parasitic effects, and noise issues.
- Design for Manufacturability: Ensure compatibility with manufacturing processes, assembly requirements, and material availability. Optimize for cost.
- Documentation and Reporting: Create a detailed report summarizing analysis, design modifications, and optimization recommendations.
- Communication: Clearly convey design rationale and its impact on IC performance and reliability.
- Master's degree in electronics
- At least 2 years of experience in a relevant field.
- Proficiency in Cadence layout tool and Ansys tool. Familiarity with 2.5D/3D packaging, silicon layout (place & route) is a plus.
- Understanding: Strong grasp of Signal & Power Integrity analysis.
- Language: Fluent in English.
- Problem-Solving: Strong problem-solving skills and behavior.
Why join VeroTech?
- A motivating salary package, with the possibility of working from home and a company car
- Improve your skillset within challenging mid to long-term R&D projects in a variety of high tech industries
- Join an inspiring community of engineers with a range in expertise and experience levels
- Work in a people-oriented company in an informal working environment
- Support in your professional career from a business team providing technical and business related trainings